• DocumentCode
    3774706
  • Title

    Ascenium: A continuously reconfigurable architecture

  • Author

    Robert Mykland

  • fYear
    2005
  • Firstpage
    1
  • Lastpage
    17
  • Abstract
    This article consists of a collection of slides from the author´s conference presentation on the special features, system design and architectures, processing capabilities, and targeted markets for Ascenium´s reconfigurable processors.
  • Keywords
    "Parallel processing","Reconfigurable logic","Bandwidth","Reconfigurable architectures","Computational efficiency","Microprocessors","Program processors"
  • Publisher
    ieee
  • Conference_Titel
    Hot Chips XVII Symposium (HCS), 2005 IEEE
  • Type

    conf

  • DOI
    10.1109/HOTCHIPS.2005.7476597
  • Filename
    7476597
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=3774706