• DocumentCode
    3774933
  • Title

    UltraScale+ MPSoC and FPGA families

  • Author

    Vamsi Boppana;Sagheer Ahmad;Ilya Ganusov;Vinod Kathail;Vidya Rajagopalan;Ralph Wittig

  • fYear
    2015
  • Firstpage
    1
  • Lastpage
    37
  • Abstract
    This article consists of a collection of slides from the authors´ conference presentation. Zynq UltraScale+ MPSoC: 2nd Generation SoC from Xilinx - Applications processing, Real-time, Graphics, Video, Serial connectivity - Power management, Safety, Security - SDSoC: Full system optimizing compiler; More than Moore: Architectural innovation - 3x CPU performance and 4.5x memory bandwidth (SoC) -UltraScale+ fabric: 60% higher performance, 2.5x performance/watt (FPGA) - 3rd generation of silicon interposer technology (3D IC); Taped out in Jun 2015 on TSMC 16FF+ - Significant power and performance benefits with 3D FinFet transistors - Diverse SW and systems running on multiple platforms today.
  • Keywords
    "Field programmable gate arrays","Graphics processing units","IEC Standards","Microprocessors","ISO Standards","Video codecs","System-on-chip","FinFETs"
  • Publisher
    ieee
  • Conference_Titel
    Hot Chips 27 Symposium (HCS), 2015 IEEE
  • Type

    conf

  • DOI
    10.1109/HOTCHIPS.2015.7477457
  • Filename
    7477457