DocumentCode
3774947
Title
Lagopus FPGA -- A reprogrammable data plane for high-performance software SDN switches
Author
K. Yamazaki;Y. Nakajima;T. Hatano;A. Miyazaki
Author_Institution
NTT Device Innovation Center, NTT Corporation
fYear
2015
Firstpage
1
Lastpage
1
Abstract
This article consists of one slide from the authors´ conference presentation. Some of the topics discussed include: What is SDN and why?; What is Lagopus vSwitch?; Packet processing on multi-core CPUs; Issues of CPU centralized processing; Designing concept and architecture; FPGA flow classification & dispatch empowered by SDNet and flow director; Performance vs. Power Dissipation; and Demonstration.
Keywords
"Field programmable gate arrays","Software defined networking","Central Processing Unit","Power dissipation","Throughput"
Publisher
ieee
Conference_Titel
Hot Chips 27 Symposium (HCS), 2015 IEEE
Type
conf
DOI
10.1109/HOTCHIPS.2015.7477471
Filename
7477471
Link To Document