DocumentCode
3774968
Title
Bandwidth engine® serial memory chip breaks 2 billion accesses/sec
Author
Michael J. Miller
Author_Institution
VP Technology Innovation & Systems Applications, MoSys
fYear
2011
Firstpage
1
Lastpage
23
Abstract
Presents a collection of slides covering the following topics: network memory access; bandwidth engine design; memory interface; and multicore process.
Keywords
"Memory management","Bandwidth","Engines","Channel capacity","Program processors"
Publisher
ieee
Conference_Titel
Hot Chips 23 Symposium (HCS), 2011 IEEE
Type
conf
DOI
10.1109/HOTCHIPS.2011.7477493
Filename
7477493
Link To Document