DocumentCode
3774969
Title
Hybrid memory cube (HMC)
Author
J. Thomas Pawlowski
Author_Institution
Architecture Development Group, Micron
fYear
2011
Firstpage
1
Lastpage
24
Abstract
This article consists of a collection of slides from the author´s conference presentation on the special features, system design, system architectures; processing capabilities, and targeted markets for Micron´s Hybrid Memory Cube (HMC).
Keywords
"Bandwidth","Random access memory","Trademarks","Scalability","Next generation networking","Concurrent computing"
Publisher
ieee
Conference_Titel
Hot Chips 23 Symposium (HCS), 2011 IEEE
Type
conf
DOI
10.1109/HOTCHIPS.2011.7477494
Filename
7477494
Link To Document