DocumentCode
3774976
Title
Low-power high-density 10GBASE-T ethernet transceiver
Author
Ramin Shirani;Ramin Farjadrad
Author_Institution
Stanford University
fYear
2011
Firstpage
1
Lastpage
20
Abstract
This article consists of a collection of slides from the author´s conference presentation on low power high-density, 10GBASE-T Ethernet transceivers. Some of the specific topics discussed include: the historical development of Ethernet; markets for Ethernet technology; processing and communications switching capabilities; 10GBase T technical requirements and processing capabilities; design challenges; LDPC architecture and wire complexity; noise measurement and cancellation techniques; Tx DAC/Hybrid architectures; the deploying of cloud storage; and future areas of technological development.
Keywords
"Ethernet ","Transceivers","Silicon","Network architecture","Low power electronics","Density measurement"
Publisher
ieee
Conference_Titel
Hot Chips 23 Symposium (HCS), 2011 IEEE
Type
conf
DOI
10.1109/HOTCHIPS.2011.7477501
Filename
7477501
Link To Document