Title :
Research accelerator for multiple processors
Author :
David Patterson; Arvind;Krste Asanov?c;Derek Chiou;James Hoe;Christos Kozyrakis; Shih-Lien Lu;Mark Oskin;Jan Rabaey;John Wawrzynek
Author_Institution :
Berkeley, CO-PI, USA
Abstract :
This article consists of a collection of slides from the author´s conference presentation on RAMP, or research acclerators for multiple processors. Some of the specific topics discussed include: system specifications and architecture; uniprocessor performance capabilities; RAMP hardware and description language features; RAMP applications development; storage capabilities; and future areas of technological development.
Keywords :
"Computer architecture","Reduced instruction set computing","Microprocessors","Product design"
Conference_Titel :
Hot Chips 18 Symposium (HCS), 2006 IEEE
DOI :
10.1109/HOTCHIPS.2006.7477751
