A 50% lower power ARM Cortex CPU using DDC technology with body bias

ARM Cortex-M0 validated at 65nm; Matched performance at 50% power; +35% performance at matched power; +55% performance at matched voltage; SRAM validated at 65nm and 55nm; 150mV Vmin reduction in production 55nm SRAM; Less than 50% static power in standby and retention; DDC technology demonstrated at advanced HKMG nodes; Lower static power at matched performance; Lower active power with body bias.