DocumentCode
3775149
Title
Integrating rack level connectivity into a PCIe switch
Author
Jack Regula;Mani Subramaniyan;Jeff Dodson
fYear
2013
Firstpage
1
Lastpage
26
Abstract
Presents a collection of slides covering the following topics: PCIe switch system block diagram; ID routing; congestion avoidance via pull protocol; QoS; integrated messaging engine; short packet push; DMA pull; fabric topologies; 3D fat tree; μserver aggregation fabric; host SW layer diagram; ExpressIOV; SR-IOV VF; performance benchmark; system HW latency estimation; simulated throughput; and payload size.
Keywords
"Switches","Programming","Servers","Biological system modeling"
Publisher
ieee
Conference_Titel
Hot Chips 25 Symposium (HCS), 2013 IEEE
Type
conf
DOI
10.1109/HOTCHIPS.2013.7478310
Filename
7478310
Link To Document