Title :
Intel® QuickPath interconnect overview
Author_Institution :
Intel, USA
Abstract :
Presents a collection of slides covering the following topics: Intel QuickPath Interconnect; platform configuration; physical layer; link pair; transmitter discrete-time linear equalizer; coefficient search; link layer; virtual channel mapping function; message class; command insert interleave; routing layer; protocol layer; and configuration agent.
Keywords :
"Topology","Protocols","Routing","Intellectual property","Warranties","Program processors","Current measurement"
Conference_Titel :
Hot Chips 21 Symposium (HCS), 2009 IEEE
DOI :
10.1109/HOTCHIPS.2009.7478336
