Title :
Instruction set innovations for Convey´s HC-1 computer
Abstract :
Presents a collection of slides covering the following topics: virtual, cache coherent, global address space; instruction based FPGA compute model; ANSI Standard C/C++/Fortran high level language support; integrated debugging environment using GDB (text or GUI based); and application development.
Keywords :
"Instruction sets","Coprocessors","Technological innovation","Venture capital","Computers","Hardware"
Conference_Titel :
Hot Chips 21 Symposium (HCS), 2009 IEEE
DOI :
10.1109/HOTCHIPS.2009.7478368
