Title :
SoC for car navigation systems with a 53.3 GOPS image recognition engine
Author :
Hideaki Kido;Shoji Muramatsu;Yasuhiko Hoshi;Hiroyuki Hamasaki;Atsuhi Nakamura;Akihiro Yamamoto
Author_Institution :
Hitachi Ltd., Japan
Abstract :
SH-Navi3 embeds : High performance dual RISC processors (1920 MIPS) : 2D/3D graphic accelerators : Image recognition engine - High-speed processing (up to 53.3GOPS): parallel processing + pipeline architecture + function specific accelerator - Bus traffic reduction & Line programmability: PIPE architecture.
Keywords :
"Image recognition","Engines","Navigation","Global Positioning System","Image reconition","User interfaces","Transportation"
Conference_Titel :
Hot Chips 21 Symposium (HCS), 2009 IEEE
DOI :
10.1109/HOTCHIPS.2009.7478375
