• DocumentCode
    3775216
  • Title

    Xilinx Virtex-6 and Spartan-6 FPGA families

  • Author

    Peter Alfke

  • Author_Institution
    Xilinx, Inc, USA
  • fYear
    2009
  • Firstpage
    1
  • Lastpage
    20
  • Abstract
    Presents a collection of slides covering the following topics: Xilinx Virtex-6 and Spartan-6 FPGA families; hard-IP blocks; architecture alignment; circuit innovation; performance improvement; flip-flops; blockRAM; clocking and DSP; select IO and gigabit transceivers; signal integrity; and integrated memory controller.
  • Keywords
    "US Department of Defense","Field programmable gate arrays","Transceivers","Computer architecture","Random access memory","Digital signal processing"
  • Publisher
    ieee
  • Conference_Titel
    Hot Chips 21 Symposium (HCS), 2009 IEEE
  • Type

    conf

  • DOI
    10.1109/HOTCHIPS.2009.7478379
  • Filename
    7478379
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=3775216