DocumentCode
3775326
Title
A perpetuum mobile 32bit CPU on 65nm SOTB CMOS technology with reverse-body-bias assisted sleep mode
Author
Shiro Kamohara;Nobuyuki Sugii;Koichiro Ishibashi;Kimiyoshi Usami;Hideharu Amano;Kazutoshi Kobayashi;Cong-Kha Pham
Author_Institution
Low-power Electronics Association & Project (LEAP), Tsukuba, Japan
fYear
2014
Firstpage
1
Lastpage
1
Abstract
Presents a conference poster that addresses a perpetuum mobile 32bit central processing unit that resides on 65nm CMOS technology using reverse-body-bias via assisted sleep mode.
Keywords
"Mobile communication","CMOS integrated circuits","CMOS technology"
Publisher
ieee
Conference_Titel
Hot Chips 26 Symposium (HCS), 2014 IEEE
Type
conf
DOI
10.1109/HOTCHIPS.2014.7478838
Filename
7478838
Link To Document