• DocumentCode
    3775392
  • Title

    Design of low quantum cost reversible BCD adder

  • Author

    Chua Shin Cheng;Lenin Gopal;Amandeep S. Sidhu;Ashutosh Kumar Singh

  • Author_Institution
    Department of Electrical and Computer Engineering, Curtin University, Sarawak Campus, CDT 250, 98009 Miri, Malaysia
  • fYear
    2015
  • Firstpage
    107
  • Lastpage
    110
  • Abstract
    Reversible logic is one of the emerging computational methodologies which assures zero power dissipation through theoretical laws of thermodynamics. It has received significant interest in application on quantum computing, nanotechnologies and low power computing devices. In this work, we present a reversible logic implementation for Binary Coded Decimal (BCD) adder which is designed to obtain lowest quantum cost value. Other parameters such as ancilla input, garbage output and delay are kept at minimal. Experiment result shows that the proposed work outperforms other designs in terms of quantum cost. Considering for a 1 digit BCD adder, it has a 4% improvement in terms of quantum cost compared to the current best existing ones. The improvement range increases as the BCD digit becomes larger.
  • Keywords
    "Adders","Logic gates","Delays","Conferences","Control systems","Quantum computing","Computers"
  • Publisher
    ieee
  • Conference_Titel
    Control System, Computing and Engineering (ICCSCE), 2015 IEEE International Conference on
  • Type

    conf

  • DOI
    10.1109/ICCSCE.2015.7482167
  • Filename
    7482167