DocumentCode :
3775651
Title :
Fault - tolerant design of the IBM POWER6™ microprocessor
Author :
Kevin Reick;Pia N. Sanda;Scott Swaney;Jeffrey W. Kellington;Michael Floyd;Daniel Henderson
Author_Institution :
IBM Systems Group, Austin, TX, United States
fYear :
2007
Firstpage :
1
Lastpage :
10
Abstract :
This article consists of a collection of slides from the author´s conference presentation on IBM´s Power6 microprocessor. Some of the specific topics discussed include: the special features, architecture and system design of Power6; system core and processing capabilities; new RAS features; the validation of resilience with proton beam accelerated testing facilities; and future areas of product improvement.
Keywords :
"Error correction codes","System-on-chip","Maintenance engineering","Program processors","Microprocessors","Particle beams"
Publisher :
ieee
Conference_Titel :
Hot Chips 19 Symposium (HCS), 2007 IEEE
Type :
conf
DOI :
10.1109/HOTCHIPS.2007.7482487
Filename :
7482487
Link To Document :
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