DocumentCode
3775660
Title
SH-X3 xible SuperH multi-core for high-performance and low-power embedded systems
Author
Shinichi Shibahara;Masashi Takada;Tatsuya Kamei;Kiyoshi Hayase;Yutaka Yoshida;Osamu Nishii;Toshihiro Hattori
Author_Institution
Renesas Technology Corp., Japan
fYear
2007
Firstpage
1
Lastpage
24
Abstract
This article consists of a collection of slides from the author´s conference presentation on Rensas´ SH-X3, a flexible superH multi-core system for high performance and low power embedded systems. Some of the specific topics discussed include: the special features, system specifications, and system design for SH-X3 line; requirements for embedded systems; system architectures; applications for use; platforms supported; processing capabilities; memory capabilities; and targeted markets.
Keywords
"System-on-chip","Embedded systems","Program processors","Multicore processing","Hybrid power systems","Global Positioning System"
Publisher
ieee
Conference_Titel
Hot Chips 19 Symposium (HCS), 2007 IEEE
Type
conf
DOI
10.1109/HOTCHIPS.2007.7482496
Filename
7482496
Link To Document