DocumentCode
3776573
Title
FPGA implementation of spectral analysis stage used in binary mask algorithm for hearing applications
Author
Vidyavati M. Gaikwad;Shridevi S. Vasekar
Author_Institution
Elect. & Telecom. Department, Smt. Kashibai Navale College of Engineering, Vadgaon(BK) Pune-41, India
fYear
2015
Firstpage
235
Lastpage
238
Abstract
This paper presents implementation of binary mask algorithm with focus on spectral analysis stage, which can be suitable for different hearing applications. FPGA implementation of spectral-analysis stage is provided, while classification and synthesis stages are implemented in Matlab. Three different types of noises at three different levels in dB are considered to evaluate performance of this algorithm. Results have shown considerable improvement in intelligibility which is measured with the help of short time objective intelligibility test. Average intelligibility obtained is 83.16%.
Keywords
"Algorithm design and analysis","Filter banks","Noise measurement","Field programmable gate arrays","Spectral analysis","MATLAB"
Publisher
ieee
Conference_Titel
Information Processing (ICIP), 2015 International Conference on
Type
conf
DOI
10.1109/INFOP.2015.7489385
Filename
7489385
Link To Document