• DocumentCode
    3777771
  • Title

    Cell library for speed-independent VLSI

  • Author

    Y. A. Stepchenkov;V. N. Zakharov;Y. G. Diachenko;N. V. Morozov;D. Y. Stepchenkov

  • Author_Institution
    Institute of Informatics Problems, Federal Research Center "Computer Science and Control" of the Russian Academy of Sciences, Moscow, Russian Federation
  • fYear
    2015
  • Firstpage
    1
  • Lastpage
    6
  • Abstract
    Paper describes content and implementation features of the cell library intended for digital self-timed (speed-independent) circuit design. The library contains more than 200 cells. Self-timed triggers with unary input and triggers with forced output are presented. The library was certified by means of developed characterization tool and was practically tested in a set of digital signal processing units manufactured in differential CMOS processes.
  • Keywords
    "Libraries","Delays","Standards","Layout","Logic gates","Very large scale integration","Wires"
  • Publisher
    ieee
  • Conference_Titel
    East-West Design & Test Symposium (EWDTS), 2015 IEEE
  • Type

    conf

  • DOI
    10.1109/EWDTS.2015.7493111
  • Filename
    7493111
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=3777771