Fault-tolerant high performance scheme design

Extending a set of faults on account of path delay ones (PDFs) for the fault-tolerant scheme previously oriented to transient or intermittent single stuck-at faults at gate poles of a synchronous sequential circuit is suggested. PDFs are also either transient or intermittent faults. The scheme is based on replicating a self-checking synchronous sequential circuit and using a checker for one of the circuit. We don´t need to provide a self-testing property for the checker. It is supposed that each next fault appears when a previous one has disappeared. Estimations of the scheme complexity, and its modification oriented to masking only PDFs are discussed.