DocumentCode :
3779546
Title :
Neural signal front-end amplifier in 45 nm technology
Author :
Jainendra Tripathi;Ranjeet Singh Tomar;Shyam Akashe
Author_Institution :
ECE Department, ITM University, Gwalior (MP), India
fYear :
2015
Firstpage :
223
Lastpage :
227
Abstract :
In this paper, a front-end amplifier is designed in 45nm CMOS technology (previously designed in 180 nm technology) for recording neural signals. This amplifier consists of three stages -(1) a pre-amplifier with a feedback loop, (2) a current gain stage with adjustable gain, and (3) a tunable filter. The first stage is a current-mode pre-amplifier with feedback loop. The feedback loop is used to bypass dc-offset current generated at the electrode-tissue interface. Adjustable current-gain stage is the second stage which is used to adjust the gain of the amplifier by the application of digital signals. Tunable filter (third stage) adjusts the low-pass cut-off frequency for different neural signals. All the stages in the amplifier are current mode circuits. To convert the output current signal of the tunable filter into voltage signal a transimpedance amplifier is used. The measured maximum voltage gain of the amplifier is 72.5 db. The maximum current noise is 23pA/√Hz, and the power consumption is 6μw at 0.8V power supply.
Keywords :
"CMOS integrated circuits","CMOS technology","Power measurement","Gain measurement","Topology"
Publisher :
ieee
Conference_Titel :
Communication Networks (ICCN), 2015 International Conference on
Type :
conf
DOI :
10.1109/ICCN.2015.43
Filename :
7507453
Link To Document :
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