Title :
Low power application for nano scaled Memristor based 2∶1 multiplexer
Author :
Arpana Verma;Shyam Akashe
Author_Institution :
ECED, ITM University, Gwalior (M.P.), India
Abstract :
Now a day market demands compressed devices that operates on low voltage and causes less noise in the output. Advanced nano scale very large integrated circuits are facing significant timing closure challenges especially due to random on chip threshold voltage variations. Memristor can play an important role in improving the scalability and efficiency of existing memory technology. Accordingly this article introduces Memristor based 2:1 multiplexer. Memristor is non linear passive two terminal electrical components relating electric charge. Memristor has dynamic relationship between current and voltage including a memory of past voltage or current. In this paper two main properties of Memristor is highlighted firstly nano scale dimension and another it´s non volatile memory characteristics. By using these properties it gives better way to design the circuit as well as it stored output too. With the many advantages of Memristor CMOS it becomes possible to reduce the area on silicon chip. Here many CMOS transistors are replaced by few Memristor and multiplexer is made. All related parameters of multiplexer, are calculated in the cadence virtuoso tool and 45nm technology with 0.7 v operating voltage.
Keywords :
"Multiplexing","Memristors","CMOS integrated circuits","Timing","Nickel","Industrial electronics"
Conference_Titel :
Communication Networks (ICCN), 2015 International Conference on
DOI :
10.1109/ICCN.2015.7