Title :
Hot-carrier-induced MOSFET degradation: AC versus DC stressing
Author :
J. Y. Choi;P. K. Ko;C. Hu
Author_Institution :
Electronics Research Laboratory, Department of Electrical Engineering and Computer Science, University of California, Berkeley, CA 94720
fDate :
5/1/1987 12:00:00 AM
Abstract :
In this paper, comparative studies on the MOSFET degradation under AC and DC stresses are presented. An excess substrate current during the trailing edge of the gate pulse may be responsible for the enhanced AC degradation.
Keywords :
"Degradation","Logic gates","Stress","Substrates","Transient analysis","Hot carriers","Charge carrier processes"
Conference_Titel :
VLSI Technology, 1987. SymVLSITech 1987. Symposium on
Print_ISBN :
978-1-5090-3151-1
