DocumentCode
3779721
Title
Trench capacitor using R.T.O. for MEGA bit DRAM´s
Author
K. Yoneda;T. Taniguchi;H. Uchida;H. Okada;H. Oishi;Y. Miyai;M. Inoue
Author_Institution
Kyoto Reserch Laboratory, Matsushita Electronics Corporation, 19, Nishikujo-Kasugacho, Minami-ku, Kyoto 601 Japan
fYear
1987
fDate
5/1/1987 12:00:00 AM
Firstpage
95
Lastpage
96
Abstract
Electrical characteristics of trench capacitors by using R.T.O. process have been discussed. Trench capacitors with high field dielectric breakdown and low interface state density are obtained by using R.T.O. at high temperature (>1100 t). Degradation of time dependent dielectric breakdown and pause refresh time of 1M bit DRAM are also improved by this technique. This technique gives us thin oxide with high quality and reliability for trench capacitors and promise to realize the high performance mega-bit class DRAM.
Keywords
"Capacitors","Oxidation","Random access memory","Films","Electric breakdown","Logic gates","Silicon"
Publisher
ieee
Conference_Titel
VLSI Technology, 1987. SymVLSITech 1987. Symposium on
Print_ISBN
978-1-5090-3151-1
Type
conf
Filename
7508747
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