DocumentCode :
3781108
Title :
System-level modeling of DSP and embedded processors
Author :
V. Zivojnovic;C. Schlager;J. Fitzner
Author_Institution :
AXYS Design Autom. Inc., Irvine, CA, USA
Volume :
2
fYear :
1998
Firstpage :
1730
Abstract :
High complexity and development costs of processor-based DSP and embedded designs permanently force the hardware and software designers to develop and intensively use processor abstractions in form of abstract processor models for specification, design, and verification of processor hardware and software. Based on the SuperSim processor modeling technology we have developed a new powerful methodology that can be used in an broad spectrum of applications ranging from DSP C compiler design over assembly code development to HW/SW co-simulation with HDL simulators.
Keywords :
"Digital signal processing","System-on-a-chip","Costs","Embedded software","Software design","Prototypes","Hardware","Logic","Manufacturing","Chip scale packaging"
Publisher :
ieee
Conference_Titel :
Signals, Systems & Computers, 1998. Conference Record of the Thirty-Second Asilomar Conference on
ISSN :
1058-6393
Print_ISBN :
0-7803-5148-7
Type :
conf
DOI :
10.1109/ACSSC.1998.751621
Filename :
751621
Link To Document :
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