A power efficient current-mode differential driver for FPGAs

This paper is committed to design a power efficient signal driver for high speed differential transmission in FPGAs. The current-mode differential driver can convert full swing differential signals to small swing differential signals with low power consumption and can transmit signals through a long distance without inserting buffers. The programmable delay elements in the driver guarantee that the driver can be adapted for different transmission lengths and different frequencies to get the best tradeoff between speed and power. The power down mode function can decrease the static current to 4.75nA. The simulation with load models shows that the circuit can operate at a frequency up to 2.5GHz with good integrity, when transmission length is 2.4mm.