DocumentCode :
3781185
Title :
A high-speed and area-efficient sign detector for three moduli set RNS {2n, 2n-1, 2n+1}
Author :
Sachin Kumar;Chip-Hong Chang
Author_Institution :
School of Electrical and Electronic Engineering, Nanyang Technological University, Singapore
fYear :
2015
Firstpage :
1
Lastpage :
4
Abstract :
Sign arithmetic is ineluctable in digital signal processing algorithms. Due to the way signed integer is represented in Residue Number System (RNS), sign detection has been a difficult operation similar to the residue-to-binary conversion. In this paper, a new sign detection method for the three moduli set RNS {2n, 2n-1, 2n +1} is proposed. It leverages the one complement and circular left shift properties of modulo 2n and 2n±1 arithmetic in the new modified Chinese Remainder Theorem for sign detection. Compared with the sign detector based on the most efficient reverse conversion algorithm, our proposed sign detector saves on average 24.5% of area and accelerates the computation by 45.6% for n = 5, 10, 15, 20.
Keywords :
"Dynamic range","Digital signal processing","Detectors","Signal processing algorithms","Heuristic algorithms","Algorithm design and analysis","Digital filters"
Publisher :
ieee
Conference_Titel :
ASIC (ASICON), 2015 IEEE 11th International Conference on
Print_ISBN :
978-1-4799-8483-1
Electronic_ISBN :
2162-755X
Type :
conf
DOI :
10.1109/ASICON.2015.7516929
Filename :
7516929
Link To Document :
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