New design for low complexity and low power partial programmable shifters

Conventional programmable shifters consume considerable amount of power and dominates the overall complexity of the entire circuit in some applications. Such power and area overhead become redundant when only part of the shifting amount is required. In this paper, therefore, a new design of partial programmable shifters is proposed to reduce the complexity and power consumption, by adopting integer partition technique to dynamically generate the simplest numerical combination of all the required shifting amounts. Such design algorithm has been validated by using 8-bit programmable shifters benchmarks. The synthesis results show that the proposed design reduces the logic complexity and dynamic power by up to 62.6% and 45.7% over the conventional full programmable shifters.