A study on HCI induced gate leakage current model used for reliability simulations in 90nm n-MOSFETs

In this paper, we propose a Hot Carrier Injection (HCI) induced gate leakage current model used for reliability simulations in 90nm n-channel MOSFETs (n-MOSFETs). As far as we have investigated, existing papers and reports regarding on HCI degradation model equations are based on the substrate current induced by the impact ionization effect. These degradation models cannot be applied for any circuit simulations without using the substrate terminal of n-MOSFETs. Since the proposed model and extraction method estimate the HCI current from the gate terminal, substrate terminals of n-MOSFETs are not necessary for simulating degradations in any circuit. The proposed HCI gate leakage model is implemented in BSIM4 source codes of our SPICE3 fully compatible simulator (MDT-SPICE). Model parameters including BSIM4 and our models are accurately extracted with DC current measurements of 90nm n-MOSFETs. It is confirmed that the proposed model showed more accurate gate current simulations than BSIM4 model comparing with the measurement of the gate current.