A novel configuration context cache structure of reconfigurable systems

The coarse-grained reconfigurable architecture (CGRA) is proven to be energy efficient in many domains, such as multi-media and signal processing. However, the continuous updating of configuration context limits the performance of reconfigurable systems severely. Configuration context cache is usually introduced in CGRAs to solve this problem. This paper proposes several methods to improve the performance of the configuration context cache. Firstly, the configuration context is classified into three levels. Secondly, a three-level hierarchical cache structure, based on the Pre-fetch and Hybrid-Priority strategies, is adopted to reduce the cache accessing time. Finally, a novel Two-Side-View design, including the physical view and the logic view, is implemented to reduce the cache size. The experimental results show that the proposed structure is 2.23 times and 2.06 times better than the up-to-date centralized and distributed structures. The proposed cache structure has been integrated in a reconfigurable computing processor called REMUS-II. When processing multi-media applications, REMUS-II can realize 1080p HiP@30fps decoding at frequency of 200MHz.