A 1.8-V 12-bit self-calibrating SAR ADC with a novel comparator

A 1.8-V 12-bit fully differential self-calibrating SAR ADC is presented in a standard 0.18μm CMOS technology. To improve the SNDR and achieve a low core area, it adapts a capacitive self-calibrating method. The way to estimate the calibration range is discussed. Based on a minimizing capacitance principle, a novel comparator is proposed to enhance speed and save power. At the speed of 6 MS/s, the ADC achieves 11.3 ENOB by Spectre simulation, with estimated comparator offset of 30mV and unit capacitor mismatch of 4% sigma. It consumes 839 μW for the analog part.