DocumentCode :
3781262
Title :
Cell-based programmable phase shifter design for pulsed radar SoC
Author :
Jinn-Yann Liu;Shi-Yu Huang;Ta-Shun Chu
Author_Institution :
EE Dept., National Tsing Hua University, Taiwan
fYear :
2015
Firstpage :
1
Lastpage :
4
Abstract :
For a pulsed Radar SoC, the programmable phase shifter is a critical timing control unit as it dictates the “time-of-arrival”, i.e., the interval between the timing a pulse signal is launched and the timing an echo pulse is sampled. A pulsed Radar SoC often sweeps this timing parameter (from a smaller value to a larger value) to set the distance of detection of an object in a scanning fashion from the center of the Radar towards the outer regions. In this paper, we demonstrate that such a programmable phase shifter can be designed with only standard cells, while being able to control the time-of-arrival in 10,000 steps with a step size of 10ps within a wide tunable range of [0ns, 10ns]. Measurements results in a 65nm process are reported.
Keywords :
"Clocks","Radar","Decision support systems","Delays","Solid state circuits","Very large scale integration"
Publisher :
ieee
Conference_Titel :
ASIC (ASICON), 2015 IEEE 11th International Conference on
Print_ISBN :
978-1-4799-8483-1
Electronic_ISBN :
2162-755X
Type :
conf
DOI :
10.1109/ASICON.2015.7517031
Filename :
7517031
Link To Document :
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