DocumentCode
3781288
Title
Effect of field implantation on off- and on-state characteristics for thin layer SOI field P-channel LDMOS
Author
Xin Zhou;Ming Qiao;Yang Li;Zhaoji Li;Bo Zhang
Author_Institution
State Key Laboratory of Electronic Thin Films and Integrated Devices, University of Electronic Science and Technology of China, Chengdu 610054, China
fYear
2015
Firstpage
1
Lastpage
4
Abstract
In this paper, the effect of field implantation (FI) on off-and on-state characteristics for thin layer SOI field P-channel LDMOS (FPLDMOS) is investigated. FI effect mechanisms are revealed by modeling, simulating, verifying experimentally. The channel discontinuity gives rise to current step in output curve due to strong electric field and impact ionized generation. Back gate (BG) punch-through breakdown weakens severely block capability. Process parameters for FI technology are optimized to avoid channel discontinuity and BG punch-through breakdown. The rugged thin layer SOI FPLDMOS with channel continuity and punch-through breakdown voltage of -329 V is realized experimentally, and successfully applied in 200-V switching IC.
Keywords
"Logic gates","Electric fields","Switches","Integrated circuits","Electric breakdown","Electrodes","Boron"
Publisher
ieee
Conference_Titel
ASIC (ASICON), 2015 IEEE 11th International Conference on
Print_ISBN
978-1-4799-8483-1
Electronic_ISBN
2162-755X
Type
conf
DOI
10.1109/ASICON.2015.7517069
Filename
7517069
Link To Document