DocumentCode
3781300
Title
A high reliability synchronous boost converter with spike suppression circuit
Author
He Jiangping;Liao Pengfei;Zhang Bo
Author_Institution
Department of Microelectronics, University of Electronic Science and Technology of China, Chengdu 610054, China
fYear
2015
Firstpage
1
Lastpage
4
Abstract
A high reliability boost converter with spike suppression circuit is proposed in this paper. Compared to the traditional boost converter, a novel control logic circuit is designed to control synchronous transistor, the voltage spike at node SW can be suppressed and the reliability is improved. In addition, the two main power switches are avoided to operate in ON state at the same time, so the efficiency is improved. The converters with/without spike suppression circuit are designed and implemented in a 0.5μm standard CMOS process. The simulations and experimental results show that the spike at node SW is reduced in the proposed converter.
Keywords
"Inductors","Transistors","Voltage control","Integrated circuit reliability","Logic gates","Schottky diodes"
Publisher
ieee
Conference_Titel
ASIC (ASICON), 2015 IEEE 11th International Conference on
Print_ISBN
978-1-4799-8483-1
Electronic_ISBN
2162-755X
Type
conf
DOI
10.1109/ASICON.2015.7517082
Filename
7517082
Link To Document