Ultra low power circuits design based on III-V group heterojunction tunnel field effect transistor

With the scaling down of MOSFET, the static leakage current increases exponentially since the Subthreshold Swing(SS) is limited by the thermal theory to 60mV/dec. Tunnel field effect transistors based on BTBT have slope Subthreshold Swing and can be used for low power applications. In this paper, InverterFO1, two-input XOR gates and SRAM cell based on III-V heterojunction TFET are designed and evaluated. Leakage power of TFET InverterFO1 decreased to 1.7%. Leakage power of SRAM cell obtains 76.3X improvements over 130nm CMOS commercial model at VDD=0.6V. Meanwhile, this paper talks about the effect of asymmetry Current of TFET to the topology structure of pass-transistor based circuits.