High performance protocol converters for two phase quasi-delay insensitive system-level communication

As different asynchronous protocol is selected for different function module design by its own advantages and disadvantages, protocol converter play an important role in ensuring the effective system-level communication. This paper proposes a new protocol and architecture for asynchronous protocol converter design. Meanwhile, circuit-level implementations of efficient two- and four-phase converters are given in the paper, which practice the converter between a level-encoded dual-rail (LEDR) two-phase protocol and four-phase return-to-zero (RZ) protocol as instance. Based on SMIC 0.18μm CMOS technology, simulations of the converter have shown that the converter is robust with quasi delay-insensitive, and achieve high performance while low power consumption and modest transistors expense. The results manifest the proposed design method is effective and the implementation of the asynchronous converter is repeatable.