DocumentCode :
3782864
Title :
Test quality and fault risk in digital filter datapath BIST
Author :
L. Goodby;A. Orailoglu
Author_Institution :
Design Technol. Center, Agilent Technol., Palo Alto, CA, USA
fYear :
2000
Firstpage :
468
Lastpage :
475
Abstract :
An objective of DSP testing should be to ensure that any errors due to missed faults are infrequent compared to a circuit´s intrinsic errors, such as overflow. A method is proposed for quantifying test quality for digital filters by measuring the risk associated with any untested faults. Techniques for finding upper bounds on fault activation rates under worst-case operating conditions are described. These techniques enable test designers to objectively discriminate significant missed faults from near-redundant faults, which are unlikely to be activated in normal operation of the device. This complements fault coverage as a measure of test quality, providing a means of locating high-risk missed faults even in very high coverage test regimes.
Keywords :
"Digital filters","Built-in self-test","Logic testing","Sequential analysis","Computer science","Design engineering","Digital signal processing","Computer errors","Upper bound","Read only memory"
Publisher :
ieee
Conference_Titel :
Design, Automation and Test in Europe Conference and Exhibition 2000. Proceedings
Print_ISBN :
0-7695-0537-6
Type :
conf
DOI :
10.1109/DATE.2000.840827
Filename :
840827
Link To Document :
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