DocumentCode :
3782905
Title :
Evolutionary multi-level network synthesis in given design style
Author :
T. Luba;C. Moraga;S. Yanushkevich;M. Opoka;V. Shmerko
Author_Institution :
Warsaw Univ. of Technol., Poland
fYear :
2000
Firstpage :
253
Lastpage :
258
Abstract :
This paper extends the technique of evolutionary network design. We study an evolutionary network design strategy from the position of design style. A hypothesis under investigation is that the uncertainty of a total search space (the space of all possible network solutions) through evolutionary network design is removed faster if this space is partitioned into subspaces. This idea has been realized through a parallel window-based scanning of these subspaces. Such a window is determined by the parameters of a multi-level network architecture in a given design style. Our approach allows to synthesize networks with more than two hundred quaternary gates. Moreover we show that information theoretical interpretation of the evolutionary process is useful, in particular in partitioning of network space and measuring of fitness function. The experimental data with 6-input quaternary and 11-inputs binary benchmarks demonstrate the efficiency of our program, EvoDesign, and an improvement against the recently obtained results.
Keywords :
"Network synthesis","Intelligent networks","Algorithm design and analysis","Design automation","Circuit synthesis","Uncertainty","Extraterrestrial measurements","Particle measurements","Computer interfaces","Computer networks"
Publisher :
ieee
Conference_Titel :
Multiple-Valued Logic, 2000. (ISMVL 2000) Proceedings. 30th IEEE International Symposium on
ISSN :
0195-623X
Print_ISBN :
0-7695-0692-5
Type :
conf
DOI :
10.1109/ISMVL.2000.848628
Filename :
848628
Link To Document :
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