DocumentCode :
3782929
Title :
Technology challenges for communications systems chips
Author :
M. Pinto
Author_Institution :
Microelectron. Group, Lucent Technol. Bell Labs., Allentown, PA, USA
fYear :
2000
Abstract :
In the era of 0.25 /spl mu/m and finer feature sizes, the IC industry has seen the advent of true systems chips (SoCs) where traditionally disparate functions-e.g., processors, logic, programmable elements, analog, RF, memory-are integrated monolithically to perform an applications level task. In addition to traditional VLSI scaling issues, SoCs present many special and sometimes unique technology challenges. This contribution focuses on those related to process technologies with a special focus on communications applications arguably the new driver of the IC industry.
Keywords :
"Communications technology","CMOS process","Cost function","Power generation economics","Semiconductor device modeling","Application specific integrated circuits","Monolithic integrated circuits","Radio frequency","Very large scale integration","Power system economics"
Publisher :
ieee
Conference_Titel :
Interconnect Technology Conference, 2000. Proceedings of the IEEE 2000 International
Print_ISBN :
0-7803-6327-2
Type :
conf
DOI :
10.1109/IITC.2000.854079
Filename :
854079
Link To Document :
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