DocumentCode :
3782957
Title :
The left edge algorithm in block test scheduling under power constraints
Author :
V. Muresan; Xiaojun Wang;M. Vladutiu
Author_Institution :
Dublin City Univ., Ireland
Volume :
1
fYear :
2000
fDate :
6/22/1905 12:00:00 AM
Firstpage :
351
Abstract :
A left-edge algorithm approach is proposed in this paper to deal with the problem of unequal-length block-test scheduling under power dissipation constraints. An extended tree growing technique is also used in combination with the left-edge algorithm in order to improve the test concurrency under power dissipation limits. Test scheduling examples and experiments are discussed highlighting further research directions toward an efficient system-level test scheduling algorithm.
Keywords :
"Scheduling algorithm","Power dissipation","Logic testing","System testing","Very large scale integration","Concurrent computing","Performance evaluation","Clocks","Digital systems","Greedy algorithms"
Publisher :
ieee
Conference_Titel :
Circuits and Systems, 2000. Proceedings. ISCAS 2000 Geneva. The 2000 IEEE International Symposium on
Print_ISBN :
0-7803-5482-6
Type :
conf
DOI :
10.1109/ISCAS.2000.857102
Filename :
857102
Link To Document :
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