DocumentCode
3783630
Title
A new verification methodology for complex pipeline behavior
Author
K. Kohno;N. Matsumoto
Author_Institution
Semicond. Co., Toshiba Corp., Kawasaki, Japan
fYear
2001
fDate
6/23/1905 12:00:00 AM
Firstpage
816
Lastpage
821
Abstract
A new test program generation tool, MVpGen, is developed for verifying pipeline design of microprocessors. The only inputs MVpGen requires are pipeline-behavior specifications; it automatically generates test cases at first from pipeline-behavior specifications and then automatically generates test programs corresponding to the test cases. Test programs for verifying complex pipeline behavior such as hazard and branch or hazard and exception, are generated. mVpGen has been integrated into a verification system for verifying RTL descriptions of a real microprocessor design and complex bugs that remained hidden in the RTL descriptions are detected.
Keywords
"Pipelines","Microprocessors","Automatic testing","Hazards","Computer bugs","Formal verification","Data structures","Boolean functions","Permission","Logic functions"
Publisher
ieee
Conference_Titel
Design Automation Conference, 2001. Proceedings
ISSN
0738-100X
Print_ISBN
1-58113-297-2
Type
conf
DOI
10.1145/378239.379072
Filename
935618
Link To Document