Analog circuit design using graded-channel SOI nMOSFETs

An extended study of analog circuit design using Graded-Channel Silicon-On-Insulator MOSFETs in comparison to conventional fully-depleted transistors is performed. The performances of a single-transistor operational transconductance amplifier implemented using Graded-Channel (GC) and conventional fully-depleted SOI nMOSFETs are compared. Improvements in the DC gain and unity-gain frequency resulting from the extremely reduced output conductance and the increased transconductance in the GC devices are discussed, based on experimental results, establishing design guidelines in order to aim at GC micropower or wide bandwidth OTAs. Two-dimensional simulations are used to analyze the intrinsic-gate capacitances in the linear and saturation regions, establishing that GC transistors present almost the same capacitive load as the conventional fully-depleted transistors in a typical analog range of operation.