Architectures for reliable computing with unreliable nanodevices

As electronic devices get smaller and smaller, so the probability of errors in manufacturing increases, and the need to use fault-tolerant techniques. This paper compares the relative performance of four such techniques: R-fold multiple redundancy; cascaded triple modular redundancy; von Neumann´s multiplexing method; and a reconfigurable computer technique. It is shown that manufacturing defect rates of the order of 0.01 to 0.1 will require enormous amounts of redundancy, of the order of 10/sup 3/ to 10/sup 5/.