Title :
A 3.3-V CMOS adaptive analog video line driver with low distortion performance
Author :
N.P. Ramachandran;H. Dinc;A.I. Karsilayan
Author_Institution :
Dept. of Electr. Eng., Texas A&M Univ., College Station, TX, USA
Abstract :
An analog line driver for video applications is presented. Utilizing a class-AB error amplifier structure, the design achieved 1.2-V peak-to-peak output swing with better than 42-dB linearity for frequencies up to 5 MHz. An adaptive tuning scheme for output impedance matching using peak detection is used to provide uniform performance across line impedance variations. The circuit is designed in AMI 0.5-/spl mu/m CMOS technology and has a tuning range of 70-180 /spl Omega/ with a power consumption of about 26.4 mW at 75-/spl Omega/ load.
Keywords :
"Driver circuits","Linearity","ISDN","Bit error rate","Circuit optimization","Impedance matching","CMOS technology","Digital signal processing","Transceivers","Transmitters"
Journal_Title :
IEEE Journal of Solid-State Circuits
DOI :
10.1109/JSSC.2003.811954
