• DocumentCode
    3785883
  • Title

    DAC Highlights

  • Author

    L. Lavagno

  • Author_Institution
    Cadence Berkeley Labs and Politecnico di Torino
  • Volume
    21
  • Issue
    3
  • fYear
    2004
  • Firstpage
    259
  • Lastpage
    260
  • Keywords
    "Electronic design automation and methodology","Application specific integrated circuits","Circuit synthesis","Circuit testing","Electrical engineering","Circuit faults","Timing","Moore´s Law","Clocks","Power supplies"
  • Journal_Title
    IEEE Design & Test of Computers
  • Publisher
    ieee
  • ISSN
    0740-7475
  • Type

    jour

  • DOI
    10.1109/MDT.2004.7
  • Filename
    1302092