A 1.0 V V/sub DD/ CMOS active pixel image sensor with complementary pixel architecture fabricated with a 0.25 /spl mu/m CMOS process

Author

Chen Xu ; Weiquan Zhang ; Mansun Chan

Author_Institution

Electr. & Electron. Eng., Hong Kong Univ. of Sci. & Technol., Kowloon, China

Volume

1

fYear

2002

fDate

7-7 Feb. 2002

Firstpage

44

Abstract

A 128/spl times/128 complementary CMOS active-pixel sensor (CAPS) is fabricated in 0.25 /spl mu/m CMOS for low-voltage application. A single-slope with correlated double sampling (CDS) is used in the readout circuit. The chip operates at a V/sub DD/ as low as 0.8 V with 15 dB added dynamic range compared with conventional CMOS APS.

Keywords

CMOS image sensors; correlation methods; image sampling; integrated circuit testing; low-power electronics; readout electronics; 0.25 micron; 0.8 V; 1 V; 128 pixel; 16384 pixel; CMOS APS; CMOS active pixel image sensor; CMOS process; chip operating voltage; complementary CMOS active-pixel sensor; complementary pixel architecture; correlated double sampling; dynamic range; low-voltage application; readout circuit; CMOS image sensors; CMOS process; CMOS technology; Crosstalk; Design engineering; Image sensors; MOSFET circuits; Multiplexing; Pixel; Voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

Solid-State Circuits Conference, 2002. Digest of Technical Papers. ISSCC. 2002 IEEE International

Conference_Location

San Francisco, CA, USA

Print_ISBN

0-7803-7335-9

Type

conf

DOI

10.1109/ISSCC.2002.992930

Filename

992930