Title :
A packet-memory-integrated 44 Gb/s switching processor with a 10 Gb port and 12 Gb ports
Author :
Lau, M. ; Shieh, S. ; Pei-Feng Wang ; Smith, B. ; Min-Shueh Yuan ; Lee, D. ; Gaba, J. ; Chao, J. ; Shung, B. ; Cheng-Chung Shih
Author_Institution :
Broadcom Corp., San Jose, CA, USA
Abstract :
A 44 Gb/s switching processor chip has 1 MB embedded packet memory. With a 10 Gb and 12 1 Gb ports, this chip is useful for LAN/WAN bridging applications. Wire-speed switching performance is demonstrated using a shared buffer switching architecture. This 0.18 μm CMOS processor integrates a 10 Gb port with an XGMII interface.
Keywords :
CMOS digital integrated circuits; LAN interconnection; buffer storage; data communication equipment; digital communication; electronic switching systems; microprocessor chips; packet switching; wide area networks; 0.18 micron; 1 MB; 44 Gbit/s; CMOS switching processor chip; LAN/WAN bridging applications; XGMII interface; embedded packet memory; packet-memory-integrated switching processor; port manager; shared buffer switching architecture; wire-speed switching performance; Aging; Bandwidth; Chaos; Ethernet networks; Local area networks; Packet switching; Scheduling; Search engines; Time division multiplexing; Writing;
Conference_Titel :
Solid-State Circuits Conference, 2002. Digest of Technical Papers. ISSCC. 2002 IEEE International
Conference_Location :
San Francisco, CA, USA
Print_ISBN :
0-7803-7335-9
DOI :
10.1109/ISSCC.2002.992934
