Title :
Single-chip 5.8 GHz ETC transceiver IC with PLL and demodulation circuits using SiGe HBT/CMOS
Author :
Masuda, T. ; Ohhata, K. ; Shiramizu, N. ; Hanazawa, S. ; Kudoh, M. ; Tanba, Y. ; Takeuchi, Y. ; Shimamoto, H. ; Nagashima, T. ; Washio, K.
Author_Institution :
Central Res. Lab., Hitachi Ltd., Tokyo, Japan
Abstract :
A single-chip 5.8 GHz ETC transceiver IC with PLL and demodulator uses SiGe HBT/CMOS. The fully integrated ETC chip includes a 31 dB-gain RX stage, an ASK demodulator, and a high-precision RSSI. The PLL is constructed with a varactor-tuned LC-VCO and a low-power BiCMOS synthesizer. The TX stage incorporates a transformer-transferred single-ended PA.
Keywords :
BiCMOS analogue integrated circuits; Ge-Si alloys; MMIC; application specific integrated circuits; demodulation; low-power electronics; phase locked loops; road traffic; semiconductor materials; transceivers; varactors; voltage-controlled oscillators; 31 dB; 5.8 GHz; ASK demodulator; ETC transceiver IC; HBT/CMOS; PLL; RX stage; SiGe; TX stage; demodulation circuits; electronic toll collection; high-precision RSSI; low-power BiCMOS synthesizer; transformer-transferred single-ended PA; varactor-tuned LC-VCO; Amplitude shift keying; BiCMOS integrated circuits; CMOS integrated circuits; Demodulation; Germanium silicon alloys; Heterojunction bipolar transistors; Phase locked loops; Silicon germanium; Synthesizers; Transceivers;
Conference_Titel :
Solid-State Circuits Conference, 2002. Digest of Technical Papers. ISSCC. 2002 IEEE International
Conference_Location :
San Francisco, CA, USA
Print_ISBN :
0-7803-7335-9
DOI :
10.1109/ISSCC.2002.992956
