DocumentCode
378837
Title
A 1 MHz-bandwidth second-order continuous-time quadrature bandpass sigma-delta modulator for low-IF radio receivers
Author
Henkel, F. ; Langmann, U. ; Hanke, A. ; Heinen, S. ; Wagner, E.
Author_Institution
Lehrstuhl fur Elektron. Bauelemente, Ruhr-Univ., Bochum, Germany
Volume
1
fYear
2002
fDate
7-7 Feb. 2002
Firstpage
214
Abstract
A 2nd-order continuous-time quadrature bandpass /spl Sigma//spl Delta/ modulator with 1 MHz IF clocked at 100 MHz digitizes I and Q inputs with SNDR of 56.2 dB for 1 MHz bandwidth inputs. The 0.65 /spl mu/m BiCMOS chip consumes 21.8 mW at 2.7 V, and operates with a clock-frequency range of 25-100 MHz.
Keywords
BiCMOS integrated circuits; digital radio; modulators; radio receivers; sigma-delta modulation; 0.65 micron; 1 MHz; 100 MHz; 2.7 V; 21.8 mW; 25 to 100 MHz; 56.2 dB; continuous-time quadrature bandpass modulator; low-if radio receivers; second-order continuous time modulator; sigma delta modulator; Band pass filters; Circuits; Clocks; Computed tomography; Delta-sigma modulation; Feedback; Frequency; Receivers; Transfer functions; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid-State Circuits Conference, 2002. Digest of Technical Papers. ISSCC. 2002 IEEE International
Conference_Location
San Francisco, CA, USA
Print_ISBN
0-7803-7335-9
Type
conf
DOI
10.1109/ISSCC.2002.993012
Filename
993012
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