DocumentCode :
378846
Title :
An 18 mW 1800 MHz quadrature demodulator in 0.18 /spl mu/m CMOS
Author :
Pfaff, D. ; Huang, Q.
Author_Institution :
Integrated Syst. Lab., Eidgenossische Tech. Hochschule, Zurich, Switzerland
Volume :
1
fYear :
2002
fDate :
7-7 Feb. 2002
Firstpage :
242
Abstract :
A demodulator has been designed which consists of a 3.6 GHz VCO, a 3.8 mA current-mode divider for the I/Q generation, and two single-ended input double-balanced mixers. The IC consumes 10 mA at 1.8 V, and has -114 dBc phase noise at 100 kHz offset, 40 dB image rejection, 14 dB DSB noise figure and 8.5 dBm IIP3.
Keywords :
CMOS integrated circuits; UHF integrated circuits; UHF mixers; demodulators; frequency dividers; microwave oscillators; mobile radio; phase noise; voltage-controlled oscillators; 0.18 micron; 1.8 V; 10 mA; 14 dB; 18 mW; 1800 MHz; 3.6 GHz; 3.8 mA; CMOS quadrature demodulator; DSB noise figure; I/Q generation; VCO; current-mode divider; image rejection; mobile transceivers; phase noise; single-ended input double-balanced mixers; CMOS technology; Demodulation; Inductors; Phase noise; Radio frequency; Resonance; Spirals; Transceivers; Tuning; Voltage-controlled oscillators;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Solid-State Circuits Conference, 2002. Digest of Technical Papers. ISSCC. 2002 IEEE International
Conference_Location :
San Francisco, CA, USA
Print_ISBN :
0-7803-7335-9
Type :
conf
DOI :
10.1109/ISSCC.2002.993026
Filename :
993026
Link To Document :
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